Electronic hobbyist Jin Zhu based in San Francisco has started a Kickstarter campaign to create a new elegant TWI/I2C library for AVR Mega series MCU, which is available from just $5 and is expected to be delivered sometime during May 2020. Zhu explained a little more about the inspiration behind the project and its goals.
“I don’t want to say it, but most if not all TWI/I2C libraries for AVR MCU floating around in the internet suck huge Python Programming Language, and as a C++ person, it’s plus plus unacceptable to me, but it’s what it is, and I want to change it, and you can help. I2C is so essential because it’s so well adopted across many integrated circuits, but we are literally living in a world with great hardware but shitty software to drive it. If 100 people agree with me, and have 5 dollars to spare, then the above statement will no longer be true, at least not for the AVR TWI part of the statement anymore, and I can guarantee you that this is the best five bucks you will have ever spend on anything.”
Items the TWI library will offer users include :
– Easy to use ( Your 8 years old kid will be able to use it with ease. Most important!)
– Glitch free ( You should focus your time and creativity on your projects. )
– Highly code efficient ( Less is more!! that is why I never like Python. )
– Full software implementation of Atmel’s Two-Wire Interface (TWI) for the I2C protocol
– 8 modes of operation: MT, MR, ST, SR, MT+ST, MR+ST, ST+MR,SR+MT (M:Master; S:Slave; T:Transmitter R:Receiver)
– 2^4 = 16 bytes for the single role mode; 2^8=256 bytes for the combined role mode. ( For instance, in MT mode, you can only send 16 bytes at a time; In MT+ST, you can send up to 16 bytes first, then receive up to 256 bytes from the slave later.)
– Both Interrupt and/or polling based! When there are pros and cons for both, then why not include them both in the library?
– AVR-C and Arduino compatible
– Selectable 244hz to 500khz Serial Clock speed with a 8Mhz system clock ( Note: SCL is meaningless for most of the time, and clock stretching from the slave will slow it down quite a lot, so we don’t really need to bother with SCL that much, unless the slave is too slow and then we will need to slow down the master as well. The technical maximum 500khz speed is only achievable when both the master and the slave can process the TWI BUS data within 16 clock cycles. Realistically a driver written in C will be half of that maximum speed, so 500khz can still be achievable with a higher 16Mhz cpu clock, but since our library will incorporate a full implementation of TWI, 100khz is the only guaranteed fastest clock speed. You can still select 500khz, but it will not output at 500khz. To increase the code and speed efficient of this library, we also have to use the slowest clock of about 15khz. Therefore in reality, the usable clock speed range is from 15khz to 100khz. Probably can get up to 200khz, but it’s not a promise. )
Source : Kickstarter