A new project soon to launch via Crowd Supplied is the Glasgow Interface Explorer, offering a highly capable and extremely flexible open source multitool for digital electronics. Created for embedded developers, reverse engineers, digital archivists, electronics hobbyists, and anyone else who wants to communicate with a wide selection of digital devices.
The Glasgow Interface Explorer development board has been designed for “maximum reliability and minimum hassle” science creators and can be attached to most devices without the need for additional active or passive components.
“The Glasgow software is a set of building blocks designed to eliminate incidental complexity. Each interface is packaged into a self-contained applet that can be used directly from the command line or integrated into a more complex system. Using Glasgow does not require any programming knowledge, though it is much more powerful if you know a bit of Python.”
Features of the Glasgow Interface Explorer :
– Communicating via UART
– Automatically determining and following the baud rate of the device under test
– Initiating transactions via SPI or I²C
– Reading and writing 24-series EEPROMs
– Reading and writing 25-series Flash memories
– Determining memory parameters via SFDP
– Reading and writing ONFI-compatible Flash memories
– Determining memory parameters via ONFI parameter page
– Programming and verifying AVR microcontrollers with SPI interface
– Automatically determining unknown JTAG pinouts
– Playing back JTAG SVF files
– Debugging ARC processors via JTAG
– Debugging some MIPS processors via EJTAG
– Programming and verifying XC9500XL CPLDs via JTAG
– Synthesizing sound using a Yamaha OPL chip and playing it in real time on a webpage
– Reading raw modulated data from 5.25″ and 3.5″ floppy drives
– …and much more!
Technical Specifications :
– iCE40HX8K Lattice Semiconductor FPGA (supported by a fully open source FPGA flow)
– FX2 HighSpeed USB interface capable of saturating 480 Mbps throughput
– Two 8-channel GPIO banks provide 16 highly flexible GPIO
– Each GPIO is capable of a theoretical speed up to 100 MHz (actual speed depends on many factors)
– Each GPIO has a dedicated level shifter with individual direction control
– Each GPIO has a dedicated, software controlled 10 K Ohm Pull-Up/-Down resistor
– Each GPIO bank has a dedicated programmable linear voltage regulator, configurable from 1.8 V to 5 V and capable of providing up to 150 mA of power
– Each GPIO bank has a dedicated sense ADC capable of monitoring the GPIO bank voltage
– All GPIO have ESD protection diodes
– An optional set of 14 differential pair GPIO, connected directly to the FPGA without any frontend circuitry, can be used for high speed interfaces
– A dedicated SYNC connector
– Five user-controllable LEDs connected to the FPGA
– Five status LEDs
Source : Crowd Supply
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