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AMD Ryzen CPU Architecture Details Revealed At ISSCC

1:33 pm February 17, 2017 By Julian Horsey


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AMD Ryzen Architecture

AMD has revealed more details about the architecture of its new Ryzen CPU range at this months International Solid-State Circuits Conference. As well as unveiling a Die Shot to whet your appetite for the new highly anticipated launch of the Ryzen processors which are expected to provide interesting competition for the current range of Intel processors currently available.

The AMD Ryzen brand has been created to expresses the power and efficiency of the all-new high-performance and highly efficient “Zen” x86 core processors. The Tech Powered Upwebsite explains more.

AMD Ryzen Architecture

The main thing to notice here is of course the fact that each core has only one integer and FPU section, rather than splitting an FPU between two integer units. This represents a major design departure from earlier designs by AMD such as Bulldozer, Piledriver, etc, but is not entirely a surprise as Ryzen has been known (or at the very least, strongly suspected) to utilize such a config for quite some time now. This represents part of AMD’s overall attempt to improve IPC by moving from a CMT (clustered multi-threading) model to a SMT (simultaneous multi-threading) based model, essentially trading two integer sections per core for one larger, better performing one. This will certainly go a long way towards raising single threaded performance and IPC.

All of that was already pretty much known, however. Of much more interest is the little section in the upper right labeled “Branch Prediction”. AMD labels this as a “Neural Net Prediction” system, but in actual CPU-terms, it is a really fancy version of something known as a branch predictor. A branch predictor’s job is to decide what a branch in the code will do before it actually happens, so the rest of the CPU can get ready for that reality. If it’s wrong (and sometimes it is), the rest of the CPU has to spend time cleaning up after its missed prediction. A good branch predictor is not often wrong, though, and saves far more time than it looses by guessing correctly more often than not the outcome of the code path. AMD is essentially claiming that its branch predictor is much improved over previous iterations, and that its learning and training process for selection of outcomes is much more intelligent. Hence the name “Neural Net Prediction.”

For more details and the full story jump over to the Tech Power website via the link below.

Source: TPU : PC Watch : HotHardware

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