Marvell has launched its new 1.6T Ethernet PHY solution, the 88X93160, enabling next-generation 100G serial-based 400G and 800G Ethernet links for high-density switches. The Marvell 1.6T Ethernet PHY is sampling now to select customers and doubles the signaling rate creates signal integrity challenges, driving the need for retimer devices for high port count switch designs. “It’s critical that retimer and gearboxes used for these applications are extremely power efficient. Implemented in the latest 5nm node, the Marvell 800GbE PHY provides a 40% savings in I/O power compared to existing 50G PAM4 based I/Os” explains Marvell.
“The Marvell 1.6T PHY incorporates the company’s 112G 5nm SerDes solution that was announced in November of last year, offering breakthrough performance with the ability to operate at 112G PAM4 across channels with >40dB insertion loss. This 112G 5nm SerDes technology will be designed in Marvell’s industry-proven Prestera switch portfolio across data center, enterprise and carrier segments. It has also been adopted for use by multiple customers of Marvell’s 5nm ASIC offering in high-performance infrastructure applications across a variety of markets.”
“Data center demand for 400GbE and beyond is experiencing exponential growth,” said Achyut Shah, senior vice president and general manager of Marvell’s PHY business unit. “We are very proud to offer the industry’s first dual 1.6T PHY with 100G PAM4 I/Os designed for cloud data centers. Our 112G SerDes in 5nm boasts industry-leading power and greatly enhances the value that high-speed Ethernet brings to cloud data center applications.”
Source : TPU
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